Channel length influenced contribution of hole and electron trapping effect to threshold voltage stability in organic field effect transistors

Effect of channel length on hysteresis and threshold voltage shift in copper phthalocyanine (CuPc) based organic field effect transistors was studied. Contrary to expectation, longer channel length devices exhibited minimum threshold voltage shift. Influence of channel length on the contribution of hole and electron trapping to threshold voltage stability was determined. Shortest channel length devices exhibited highest electron trapping effect while longest channel devices exhibited minimum hole as well as electron trapping. Lower hole trap effect for longer channel length devices was suggested to be due to reduced longitudinal field between source and drain electrodes while minimum electron trapping was attributed to suppression of drain current by increased hole trap centres.     

Voltage Assisted Control of Spin-Transfer Nano-Oscillators

The spin-transfer nano-oscillator(STNO) has recently acquired a huge amount of research interest, due to its promising easy tunability along with the miniature size. The output frequency control of an STNO through magnetic field and current has been examined almost to its full extent; however, there are issues that still need to be addressed. Here, we propose a novel way of voltage control of the output frequency of an STNO, and alongside reducing its power requirement.     

High-voltage and low specific on-resistance power UMOSFET using P and N type columns

For the first time, we present the unique features exhibited by power 4H–SiC UMOSFET in which N and P type columns (NPC) in the drift region are incorporated to improve the breakdown voltage, the specific on-resistance, and the total lateral cell pitch. The P-type column creates a potential barrier in the drift region of the proposed structure for increasing the breakdown voltage and the N-type column reduces the specific on-resistance. Also, the JFET effects reduce and so the total lateral cell pitch will decrease. In the NPC-UMOSFET, the electric field crowding reduces due to the created potential barrier by the NPC regions and causes more uniform electric field distribution in the structure. Using two dimensional simulations, the breakdown voltage and the specific on-resistance of the proposed structure are investigated for the columns parameters in comparison with a conventional UMOSFET (C-UMOSFET) and an accumulation layer UMOSFET (AL-UMOSFET) structures. For the NPC-UMOSFET with 10 µm drift region length the maximum breakdown voltage of 1274 V is obtained, while at the same drift region length, the maximum breakdown voltages of the C-UMOSFET and the AL-UMOSFET structures are 534 and 703 V, respectively. Moreover, the proposed structure exhibits a superior specific on-resistance (R_on,sp) of 2 mΩ cm², which shows that the on-resistance of the optimized NPC-UMOSFET are decreased by 56% and 58% in comparison with the C-UMOSFET and the AL-UMOSFET, respectively.     

提升“思想道德修养与法律基础”课堂魅力的方法探析

"思想道德修养与法律基础"课程是高校思想政治理论课的重要组成部分。把基础课课堂魅力作为研究内容,通过课堂观察法和自身授课经验总结法,对影响基础课课堂魅力的因素进行分析,发现教师自身和教学方式是主要影响因素。提升基础课教师自身魅力和教学方式魅力可有效解决基础课课堂实效性差等问题,为顺利实现教学目标,有效发挥思想政治教育作用奠定基础。     

一种计算空间异面高压线间最短距离的方法

在电力工程建设、运行、管理中,需要遵循许多行业规范,尤其是高压线间的间距,关系到电网运行的安全与否。对于一些容易判断两线间最短距离的高压线,如平行的高压线等,可以方便的求出其最短距离,但是,在遇到一些不易判断出两线间最短距离位置的高压线时,需要通过一定的方法求出两高压线间的最短距离,以判断是否符合规范要求,确保电网的安全运行。本文提出一种利用Mathematica软件计算空间异面高压线间最短距离的方法。     

Effect of Moving Speed of Charged Metallic Spherical Electrode on Electrostatic Discharge

In this investigation, the nature of the electrostatic discharge (ESD) that occurs when a charged object moves toward a stationary grounded object is experimentally clarified. The spark lengths, discharge currents, and induced voltages in a magnetic probe were measured when a charged metallic spherical electrode connected to a 422 pF capacitor approached a stationary grounded object, which was the current target, for different moving speeds of the charged metallic spherical electrode in a range of 1 mm/s to 100 mm/s. The charge voltages of the capacitor were +6.5 kV and +10 kV. Based on the results, the average gap length shortened with the speed of the spherical electrode. The average peak values of the discharge current and the induced voltage were likely to increase with the speed of the spherical electrode. The average rise times of the discharge current and the induced voltage were likely to drop with the speed of the spherical electrode. The relation between the spark length and the discharge current due to the ESD can be explained qualitatively by using an equation derived from the spark resistance formula proposed by Rompe and Weizel.     

基于关键路径延时检测的自适应电压缩减技术

为了减小传统的最差情况设计方法引入的电压裕量,提出了一种变化可知的自适应电压缩减(AVS)技术,通过调整电源电压来降低电路功耗.自适应电压缩减技术基于检测关键路径的延时变化,基于此设计了一款预错误原位延时检测电路,可以检测关键路径延时并输出预错误信号,进而控制单元可根据反馈回的预错误信号的个数调整系统电压.本芯片采用SMIC180 nm工艺设计验证,仿真分析表明,采用自适应电压缩减技术后,4个目标验证电路分别节省功耗12.4％,11.3％,10.4％和11.6％.     

中高压变频器冷却方案比较和选型分析

随着电力电子器件的发展,性能优异的中高压变频器在各行各业中得到越来越广泛的应用,能否处理好变频器的散热问题是其长期稳定运行的关键。分析了中高压变频器热量产生来源,并从技术可行性、可靠性、经济性等角度对不同冷却方案的特点进行比较,并结合实际的工程案例,给出合理的变频器冷却方案选型建议,可作为工程电气设计时中高压变频器冷却方案选型参考。     

Application of differential evolution for cascaded multilevel VSI with harmonics elimination PWM switching

Harmonic elimination pulse width modulation (HEPWM) method has been widely applied to multilevel voltage source inverter (MVSI) to remove low frequency harmonics from its output voltage. However, the computation of the HEPWM switching angles for MVSI is very challenging due to several constraints, namely angle sequencing, very tight angular spacing and the numerous possibilities of angles distribution ratio. Realizing the potential of Differential Evolution (DE) to handle complex problems, this work proposes its application to solve the HEPWM problem for cascaded MVSI. Its emphasis is on improving the availability of HEPWM for higher output voltage by extending the maximum range of modulation index (M). It also removes the discontinuities in the switching angles and reduces the number of distribution ratio required to obtain the required solution. Compared to the most advanced (similar) work, i.e., 7-level MVSI with seventeen switching angles, DE covers a wider range of M; the maximum achievable M is 2.80. Furthermore, it exhibits very low second order distortion factor (DF₂): for the worst case, the value of DF₂ is 0.0014%. To verify the viability of the proposed algorithm, simulation is carried out and hardware prototype is constructed. Both results show very good agreement with the theoretical prediction.     

建筑电气工程中低压配电系统的安装与调试

低压配电系统对建筑电气工程是非常重要的，本文对其安装做论述，针对各种建筑物对配电的要求，对系统做合理的调试，最终实现建筑实体安全用电，同时也确保低压配电系统的稳定性。